EMBEDDED CORE DESIGN WITH FPGAS
商品資訊
ISBN13:9780071474818
出版社:Mcgraw-Hill; Inc.
作者:ZAINALABEDIN NAVABI
出版日:2006/10/01
裝訂:精裝
商品簡介
- Embedded design is the new wave in digital systems design. This book pulls together Logic Design, Computer Architecture, Verilog, and FPGAs and shows how an engineer can utilize his or her computer engineering background for design of embedded systems
- The heart of an embedded system is a processor. This book shows how a processor can be designed from scratch and by use of new EDA tools, and how it interfaces with its software. It shows how a processor and its software can be used as an embedded core and used for the design of an embedded system. The book shows the important role of a compiler in the design of hardware
- This is one place that an engineering student can see how his or her learnings can help him or her in design of real systems. Because of the necessary background information, undergraduate courses can only concentrate on one topic of hardware design. Often, a student passes a computer architecture course without really understanding the detailed inter-workings of a processor. A book like this build shows how real designs are done.
- Altera's software and new UP3 development board are used for implementing designs, making the book very practical and with a very specific target. All modern EDA design tools are discussed and used in this book.
- Marketing support from Altera through their University Program, with potential for substantial buyback! Navabi is heavily connected with Altera which purchased 2000 copies of a book he wrote for Springer on Altera's older UP2.
作者簡介
目次
PREFACE
INTRODUCTION
ACKNOWLEDGMENTS
Chapter 1: Elements of Embedded Design
Chapter 2: Logic Design Concepts
Chapter 3: RTL Design with Verilog
Chapter 4: Computer Hardware and Software
Chapter 5: Field Programmable Devices
Chapter 6: Tools for Design and Prototyping
Chapter 7: Design of Utility Hardware Cores
Chapter 8: Design with Embedded Processors
Chapter 9: Design of an Embedded System
APPENDIX A: NIOS II INSTRUCTION SET
APPENDIX B: ADDITIONAL RESOURCES
INDEX
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