Design and Test Technology for Dependable Systems-on-chip
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ISBN13:9781609602123
出版社:Information Science Reference
作者:Raimund Ubar (EDT); Jaan Raik (EDT); Heinrich Theodor Vierhaus (EDT)
出版日:2010/10/30
裝訂:平裝
規格:29.8cm*22.9cm*3.8cm (高/寬/厚)
定價
:NT$ 10800 元若需訂購本書,請電洽客服 02-25006600[分機130、131]。
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Computer scientists, electrical engineers, and related researchers explore aspects of system design and efficient modeling, but also introduce various fault modes and fault mechanisms associated with digital circuits integrated into systems-on-chip (SoC), including versions for multi-processors and networks. They write primarily for practitioners and researchers already working in SoC, but also for graduate and undergraduate students with a basic understanding of electronics and computer engineering who can get comfortable designing dependable system from not-so reliable base components. They cover design, modeling, and verification; faults, compensation, and repair; fault simulation and fault injection; test technology for systems-on-chips; and test planning, compression, and compaction. Annotation c2011 Book News, Inc., Portland, OR (booknews.com)
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