Silicon Nanowire Transistors

This book describes a simple, one-dimensional analytical model to understand the physical conduction mechanism and the device behavior of Silicon Nanowire (SNW) Transistors. The authors show how to design n and p-channel transistors with single and dual work functions, the SPICE transistor models for circuit simulations, different types of digital circuits that can be used in implementing logic gates and megacells, an SRAM design, and an analog application implementing an high bandwidth amplifier. Most importantly, the discussion also includes the various digital applications of this technology for the next generation VLSI (or rather ULSI), targeting low static and dynamic power consumption. The authors describe their design for a spike and fire neuron, a simple FPGA architecture, and a Direct Sequence Spread Spectrum (DSSS) baseband transmitter, using SNW technology.

Ahmet Bindal received his M.S. and Ph.D. degrees in Electrical Engineering Department from the University of California, Los Angeles CA. His doctoral research was the material characterization for high electron mobility GaAs transistors. During his graduate program, he was a graduate research associate and technical consultant for Hughes Aircraft Co. In 1988, he joined the technical staff of IBM Research and Development Center in Fishkill, NY, where he worked as a device design and characterization engineer. He developed asymmetrical MOS transistors and ultra thin Silicon-On-Insulator (SOI) technologies for IBM. In 1993, he transferred to IBM in Rochester, MN, as a senior circuit design engineer to work on the floating-point unit for AS-400 main frame processor. He continued his circuit design career at Intel Corporation in Santa Clara, CA, where he designed 16-bit packed multipliers and adders for the MMX unit for Pentium II processors. In 1996, he joined Philips Semiconductors in Sunnyvale, CA, where he was involved in the designs of instruction/data caches and various SRAM modules for the Trimedia processor. His involvement with VLSI architecture started in Philips Semiconductors and led to the design of the Video-Out and Image Co-Processor units for the same processor. In 1998, he joined Cadence Design Systems as a VLSI architect and directed a team of engineers to design self-timed asynchronous processors. Staring 2000 he implemented 802.11a and 802.11b wireless LAN protocols in VLSI. After approximately 20 years of industry work, he joined the Computer Engineering faculty at San Jose State University in 2002. His current research interests range from Nano-Scale Electron Devices to VLSI Design and Nano-Scale Architectures. Dr. Bindal has over 20 scientific journal and conference publications and 10 invention disclosures with IBM; he currently holds 3 U.S. patents with IBM and 1 with Intel Corporation.