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精裝 (5)
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Saraju P. Mohanty (EDT)/ Ashok Srivastava (EDT) (2)
Anirban Sengupta/ Saraju P. Mohanty (1)
Jawar Singh/ Saraju P. Mohanty/ Dhiraj K. Pradhan (1)
Narayan (Center for Artificial Intelligence and Robotics (CAIR) Panigrahi Bangalore India),Saraju P. (University of North Texas Mohanty United States) (1)
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Inst of Engineering & Technology (3)
PBKTYFRL (1)
Springer Verlag (1)

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5筆商品,1/1頁
IP Core Protection and Hardware-assisted Security for Consumer Electronics
作者:Anirban Sengupta; Saraju P. Mohanty  出版社:Inst of Engineering & Technology  出版日:2019/03/25 裝訂:精裝
若需訂購本書,請電洽客服
02-25006600[分機130、131]。
Nano-CMOS and Post-CMOS Electronics ─ Devices and Modelling
作者:Saraju P. Mohanty (EDT); Ashok Srivastava (EDT)  出版社:Inst of Engineering & Technology  出版日:2016/05/01 裝訂:精裝
The demand for ever smaller and more portable electronic devices has driven metal oxide semiconductor-based (CMOS) technology to its physical limit with the smallest possible feature sizes. This prese
若需訂購本書,請電洽客服
02-25006600[分機130、131]。
Nano-cmos and Post-cmos Electronics ― Circuits and Design
作者:Saraju P. Mohanty (EDT); Ashok Srivastava (EDT)  出版社:Inst of Engineering & Technology  出版日:2016/08/31 裝訂:精裝
Continuing from volume 1, this volume outlines circuit- and system-level design approaches and issues for these devices.Topics covered include self-healing analog/RF circuits; on-chip gate delay varia
若需訂購本書,請電洽客服
02-25006600[分機130、131]。
Robust SRAM Designs and Analysis
作者:Jawar Singh; Saraju P. Mohanty; Dhiraj K. Pradhan  出版社:Springer Verlag  出版日:2012/07/31 裝訂:精裝
This book provides a guide to Static Random Access Memory (SRAM) bitcell design and analysis to meet the nano-regime challenges for CMOS devices and emerging devices, such as Tunnel FETs. Since proces
若需訂購本書,請電洽客服
02-25006600[分機130、131]。

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